Infineon Technologies TriCore Compiler Operation & User’s Manual

23, TriCore 32-bit Unified Processor Compiler Writer’s Guide User’s Manual 23 V1.4, 2003-12 To update the register copy of such a variable, it is normally necessary to use the INS.T instruction to move the source bit value into the target bit location. To update the memory copy, the r…

22, TriCore 32-bit Unified Processor Compiler Writer’s Guide User’s Manual 22 V1.4, 2003-12 1.3.3 Bit-Logical Instructions The bit-logical instructions include the simple bit-logical instructions and the so-called accumulating bit-logical instructions. They are mainly intended t…

34, TriCore 32-bit Unified Processor Compiler Writer’s Guide User’s Manual 34 V1.4, 2003-12 In TriCore 2.0 the situation is different in that the FPU has been integrated into the core and behaves as if it is part of the IP pipeline. The compiler writer should therefore schedule FP…

46, TriCore 32-bit Unified Processor Compiler Writer’s Guide User’s Manual 46 V1.4, 2003-12 3.3 FORALL Loops FORALL is a loop construct in the Fortran 90 standard. The for and FORALL Loop Order of Execution table below, illustrates the differences in the order of execution of C for loop and For…

15, TriCore 32-bit Unified Processor Compiler Writer’s Guide User’s Manual 15 V1.4, 2003-12 Replacing an actual call to the abs() library function with the ABS instruction is problematic. In theory the user should be able to shadow the standard library with an abs() function that does so…

18, Infineon Technologies TriCore Compiler TriCore 32-bit Unified Processor Compiler Writer’s Guide User’s Manual 18 V1.4, 2003-12 The latter would arguably be a more intuitive definition, but its implementation would require either four parallel operand reads in one cycle, or a true “conditional write” to the destination …