Motorola CPU32 Reference Manual

Reference Manual for Motorola CPU32 Processor (330 pages)

Specifications:

926/926418-cpu32.pdf file (30 Dec 2023)
  • Manufacturer: Motorola
  • Category of Device: Processor
  • Document: CPU32, File Type: PDF Reference Manual
  • Updated: 30-12-2023
  • Count of Pages: 330
Download CPU32 Manual (330 pages)

Read PDF Document Online:

Data: UPD 30th December 2023

Motorola CPU32 Processor PDF Reference Manual (Updated: Saturday 30th of December 2023 01:26:41 AM)

Rating: 4.5 (rated by 42 users)

Compatible devices: DSP56000, DSP56800, MC68302, MVME2400 Series, MVME2300 Series, DSP56303, DSP56367, DragonBall MC9328MX1.

Recommended Documentation:

  • DSP56000 Operation & user’s manual (UPD: 08 Mar 2024, motorola/dsp56000.pdf) ()
  • CPU32 Reference manual (UPD: 30 Jun 2023, motorola/cpu32.pdf) ()
  • MC68328 Operation & user’s manual (UPD: 17 Oct 2023, motorola/mc68328.pdf) ()
  • DSP56362 Operation & user’s manual (UPD: 25 Sep 2023, motorola/dsp56362.pdf) ()
  • MC68340 Operation & user’s manual (UPD: 29 Feb 2024, motorola/mc68340.pdf) ()

Text Version of Motorola CPU32 Processor Manual (Summary of Contents)

(Ocr-Read of Motorola CPU32 Document (Main Content), UPD: 30 December 2023)

  • 330, CPU32 INDEX MOTOROLA REFERENCE MANUAL I-4 Single Operand Instruction Timing 8-18 Six-Word Stack Frame, Normal 6-22 Sizing, Dynamic Bus 6-16, 6-23 Software Breakpoints 6-8 Software Fault Recovery 6-19 Space Formats 5-4 Type 0000 - Breakpoint 5-4 Type 0001 - MMU Access 5-4 Type 0010 - Copr…

  • 162, MOTOROLA INSTRUCTION SET CPU32 4-114 REFERENCE MANUAL NBCD Negate Decimal with Extend NBCD Instruction Fields: Effective Address field — Specifies the destination operand. Only data alterable addressing modes are allowed as shown: Addressing Mode Mode Register Addressing Mode Mode Reg…

  • 329, Motorola CPU32 CPU32 INDEX MOTOROLA REFERENCE MANUAL I-3 Program Control (Branch) 4-10, 8-20 Shift and Rotate 4-9, 8-19 Single Operand 8-18 System Control 4-11, 8-21 Table Lookup and Interpolation 4-188 Interrupts 6-12 –L– Logic Instructions 4-8 Low-Power Stop (LPSTOP) 4-1, 5-1 –M– M68000 Family Address…

  • 7, CPU32 MOTOROLA REFERENCE MANUAL vii (Continued) Paragraph Title Page TABLE OF CONTENTS 7.2.4 Command Execution .........................................................................7-5 7.2.5 Background Mode Registers .............................................................7-6 7.2.5.…

  • 78, MOTOROLA INSTRUCTION SET CPU32 4-30 REFERENCE MANUAL ANDI AND Immediate to Condition Code Register ANDI to CCR to CCR Operation: Source • CCR → CCR Assembler Syntax: ANDI #〈data〉, CCR Attributes: Size = (Byte) Description: Performs an AND operation of the immediate operand with the c…

  • 81, CPU32 INSTRUCTION SET MOTOROLA REFERENCE MANUAL 4-33 ASL, ASR Arithmetic Shift ASL, ASR Condition Codes: X Set according to the last bit shifted out of the operand. Unaffected for a shift count of zero. N Set if the most significant bit of the result is set. Cleared otherwise. Z Set if…

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