Specifications:913/913306-arria_10.pdf file (19 Aug 2023)
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Intel Arria 10 series Motherboard, Transceiver PDF Operation & User’s Manual (Updated: Saturday 19th of August 2023 02:42:24 AM)
Rating: 4.7 (rated by 29 users)
Compatible devices: DG35EC, H61 Series, D925XECV2, D915GEV, BLKD915GMHLK - LGA775 800FSB Dual DDR400 GIG Lan PCI Express mBTX 10, DG43NB - Desktop Board Classic Series Motherboard, 9EJL4, SE7210TP1-E - Socket 478 ATX Server Motherboard.
Recommended Documentation:
136, The Backplane Ethernet 10GBASE-KR PHY IP core includes the following new modules to enable operation over a backplane: • Link Training (LT)— The LT mechanism allows the 10GBASE-KR PHY to automatically configure the link-partner TX PMDs for the lowest Bit Error Rate (BER). LT is defined in C…
336, Document Version Changes Made the following changes to the Gigabit Ethernet (GbE) and GbE with IEEE 1588v2 section: • Added description about the RX FIFO and TX FIFO in the "GbE with IEEE 1588v2" section. • Added a note to the pll_powerdown signal in the "Connec…
372, Intel Arria 10 series Port Range Clock Domain Description pll_refclk3 input N/A Reference clock input port 3. pll_refclk4 input N/A Reference clock input port 4. tx_serial_clk output N/A High speed serial clock output port for GX channels. Represents the x1 clock network. pll_locked output Asynchronous Active hig…
139, Refer to Select and Instantiate the PHY IP Core on page 33. 2. Select Backplane-KR from the IP variant list located under Ethernet Intel FPGA IP Core Type. 3. Use the parameter values in the tables in 10GBASE-R Parameters on page 140, 10GBASE-KR Auto-Negotiation and Link Trainin…
427, Figure 207. Dynamic Reconfiguration of Receiver Channel During Device Operation 1 3 Device Power Up rx_cal_busy rx_analogreset rx_is_lockedtodata rx_digitalreset 2 4 5 Legal Reconfiguration Window t req t LTD min 4 μs t req = 70 μs 4.3.2. Model 2: Acknowledgment Model The ac…
124, 2.6.2. 10GBASE-R, 10GBASE-R with IEEE 1588v2, and 10GBASE-R with FEC Variants 10GBASE-R PHY is the Ethernet-specific physical layer running at a 10.3125-Gbps data rate as defined in Clause 49 of the IEEE 802.3-2008 specification. Arria 10 transceivers can implement 10GBASE-R variant…
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