Analog Devices ADSP-2181 Manual 

37, Analog Devices ADSP-2181 ADSP-2181/ADSP-2183 REV. 0 –37– ORDERING GUIDE Ambient Instruction Temperature Rate Package Package Part Number Range (MHz) Description Option* ADSP-2181KST-115 0°C to +70°C 28.8 128-Lead TQFP ST-128 ADSP-2181BST-115 –40°C to +85°C 28.8 128-Lead TQFP ST-128 ADSP-2181KS-115 0°C to +70°C …

17, ADSP-2181/ADSP-2183 REV. 0 –17– MEMORY TIMING SPECIFICATIONS The table below shows common memory device specifications and the corresponding ADSP-2183 timing parameters, for your convenience. Memory ADSP-2183 Timing Device Timing Parameter Specification Parameter Definition Address Setup…

19, ADSP-2181/ADSP-2183 REV. 0 –19– ADSP-2183 CAPACITIVE LOADING Figures 17 and 18 show the capacitive loading characteristics of the ADSP-2183. C L – pF RISE TIME (0.4V – 2.4V) – ns 30 0 0 20025 50 75 100 125 150 175 25 20 15 10 5 T = +85°C V DD = 3.0V Figure 17. Typical Output Rise Ti…

22, ADSP-2181/ADSP-2183 REV. 0 –22– ADSP-2181/ADSP-2183 Parameter Min Max Unit Bus Request/Grant Timing Requirements: t BH BR Hold after CLKOUT High 1 0.25t CK + 2 ns t BS BR Setup before CLKOUT Low 1 0.25t CK + 17 ns Switching Characteristics: t SD CLKOUT High to xMS, 0.25t CK + …

27, ADSP-2181/ADSP-2183 REV. 0 –27– ADSP-2181 Parameter Min Max Unit IDMA Write, Short Write Cycle Timing Requirements: t IKW IACK Low before Start of Write 1 0ns t IWP Duration of Write 1, 2 15 ns t IDSU IAD15–0 Data Setup before End of Write 2, 3, 4 5ns t IDH IAD15–0 Data Hold after End of W…

15, ADSP-2181/ADSP-2183 REV. 0 –15– t DECAY , is dependent on the capacitive load, C L , and the current load, i L , on the output pin. It can be approximated by the fol- lowing equation: t DECAY = C L •0.5V i L from which t DIS = t MEASURED –t DECAY is calculated. If …