Intel Stratix 10 Operation & User’s Manual

Operation & User’s Manual for Intel Stratix 10 Computer Hardware, Control Unit (228 pages)

Specifications:

1408/1408391-stratix_10.pdf file (08 Apr 2024)
  • Manufacturer: Intel
  • Category of Device: Computer Hardware, Control Unit
  • Document: Stratix 10, File Type: PDF Operation & User’s Manual
  • Updated: 08-04-2024
  • Count of Pages: 228
Download Stratix 10 Manual (228 pages)

Read PDF Document Online:

Data: UPD 8th April 2024

Intel Stratix 10 Computer Hardware, Control Unit PDF Operation & User’s Manual (Updated: Monday 8th of April 2024 05:22:28 PM)

Rating: 4.2 (rated by 6 users)

Compatible devices: RMS25CB080, ARRANDALE IB957, D845GRG, TS13X, 865G, MCS 51, D410PT, E6600 - Core 2 Duo Dual-Core Processor.

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Text Version of Intel Stratix 10 Computer Hardware, Control Unit Manual (Summary of Contents)

(Ocr-Read of Intel Stratix 10 Document (Main Content), UPD: 08 April 2024)

  • 198, The reset values in this table represents register values after a reset has completed. Bit Name Description SW Access HW Access Protection Reset 11:8 tx_dsk_active_chans Active Channels. 1 bit per channel (bit0 = AIB chan 0). Indicates which AIB channels received a deskew marker (since re…

  • 9, Figure 2. Intel Stratix 10 TX Device with 2 E-Tiles and 1 H-Tile (72 Transceiver Channels) E-Tile (24 Channels) E-Tile (24 Channels) H-Tile (24 Channels) Package Substrate EMIBEMIB EMIB Core Fabric ® TX 850 SF50 (F2397) TX 1100 SF50 (F2397) Figure 3. Intel Stratix 10 TX Device with 3 E-…

  • 203, Intel Stratix 10 Bit Name Description SW Access HW Access Protection Reset Restarts the synchronization. - 2 fec_3bad RX was locked (and aligned if RSFEC_CORE_CFG.frac = none) but 3 consecutive FEC codewords could not be corrected. Restarts the synchronization. RW RO - 0x0 1 not_locked RX lane not lo…

  • 55, Document Version Changes • Changed the following parameters in the "General, Datapath Options, and Common PMA Options" table: — Removed the Enable RS-FEC parameter — Removed the Enable datapath and interface reconfiguration parameter — Changed the values and description for th…

  • 175, Only one loopback mode can be enabled at a time. For example, set 0x84[7:0] to 0x01 and 0x85[7:0] to 0x03 to enable internal or serial loopback and disable reverse parallel loopback. PMA Can Be Running While Updating PMA Attribute? Yes Return Value {0x89[7:0],0x88[7:0]} 0x0008 9.2.7. 0x000A: Rece…

  • 80, 100GbE with KP-FEC uses two physical PAM4 coded lanes, also called, 100 Gigabit Attachment Unit Interface (CAUI-2). It uses the RS(544,514) FEC. The two physical lanes are supported by bit-multiplexing the RS-FEC core’s four PMA lanes pairwise outside of the RS-FEC core. The remaining defin…

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