Cypress Semiconductor CY7C1333H Manual, Specification Sheet

11, PRELIMINARY CY7C1333H Document #: 001-00209 Rev. ** Page 11 of 12 © Cypress Semiconductor Corporation, 2004. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied…

1, PRELIMINARY 2-Mbit (64K x 32) Flow-Through SRAM with NoBL™ Architecture CY7C1333H Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600 Document #: 001-00209 Rev. ** Revised April 11, 2005 Features • Can support up to 133-MHz bu…

2, PRELIMINARY CY7C1333H Document #: 001-00209 Rev. ** Page 2 of 12 Selection Guide CY7C1333H-133 CY7C1333H-100 Unit Maximum Access Time 6.5 8.0 ns Maximum Operating Current 225 205 mA Maximum CMOS Standby Current 40 40 mA Shaded area contains advance information. Please contact your local Cypres…

6, PRELIMINARY CY7C1333H Document #: 001-00209 Rev. ** Page 6 of 12 Truth Table for Read/Write [2, 3] Function WE BW A BW B BW C BW D Read HXXXX Write No Bytes Written LHHHH Write Byte A – (DQ A ) L LHHH Write Byte B – (DQ B )LHLHH Write Byte C – (DQ C )LHHLH Write Byte D – (DQ D )…

3, Cypress Semiconductor CY7C1333H PRELIMINARY CY7C1333H Document #: 001-00209 Rev. ** Page 3 of 12 Pin Definitions (100-pin TQFP Package) Name I/O Description A 0 , A 1 , A Input- Synchronous Address Inputs used to select one of the 64K address locations. Sampled at the rising edge of the CLK. A [1:0] are fed to the two-bi…