Cypress Semiconductor NoBL CY7C1352G Manual, Specification Sheet

8, CY7C1352G Document #: 38-05514 Rev. *D Page 8 of 12 Switching Characteristics Over the Operating Range [16, 17] Parameter Description –250 –200 –166 –133 UnitMin. Max. Min. Max. Min. Max. Min. Max. t POWER V DD (typical) to the first Access [12] 1111ms Clock t CYC Clock Cycle Time…

2, CY7C1352G Document #: 38-05514 Rev. *D Page 2 of 12 Selection Guide 250 MHz 200 MHz 166 MHz 133 MHz Unit Maximum Access Time 2.6 2.8 3.5 4.0 ns Maximum Operating Current 325 265 240 225 mA Maximum CMOS Standby Current 40 40 40 40 mA Pin Configuration A A A A A 1 A 0 NC/288M NC/144M V SS V DD …

11, Cypress Semiconductor NoBL CY7C1352G CY7C1352G Document #: 38-05514 Rev. *D Page 11 of 12 © Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypre…

10, CY7C1352G Document #: 38-05514 Rev. *D Page 10 of 12 NOP, STALL, and DESELECT Cycles [18, 19, 21] ZZ Mode Timing [22, 23] Notes: 21. The IGNORE CLOCK EDGE or STALL cycle (Clock 3) illustrated CEN being used to create a pause. A write is not performed during this cycle. 22. Devic…

7, CY7C1352G Document #: 38-05514 Rev. *D Page 7 of 12 I SB4 Automatic CE Power-down Current—TTL Inputs V DD = Max, Device Deselected, V IN ≥ V IH or V IN ≤ V IL , f = 0 All speeds 45 mA Capacitance [11] Parameter Description Test Conditions 100 TQFP Max. Unit C IN Input …