Specifications:270/270382-mpc8260_powerquicc_ii_family_reference_manual.pdf file (26 Nov 2023)
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Freescale Semiconductor MPC8260 PowerQUICC II Family Computer Hardware PDF Family Reference Manual (Updated: Sunday 26th of November 2023 11:32:05 AM)
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Compatible devices: i.MX31 PDK 1.4, USB-KW24D512, MPC8309, TWR-MPC8309, SC140 DSP Core, Motorola MMDS0508, MPC850, HC05P3.
Recommended Documentation:
1229, FCC HDLC Controller MPC8260 PowerQUICC II Family Reference Manual, Rev. 2 Freescale Semiconductor 36-5 Figure 36-2. HDLC Address Recognition Example 36.5 Programming Model The core configures each FCC to operate in the protocol specified in GFMR[MODE]. The HDLC controller uses the same data str…
589, Freescale Semiconductor MPC8260 PowerQUICC II Family Serial Interface with Time-Slot Assigner MPC8260 PowerQUICC II Family Reference Manual, Rev. 2 Freescale Semiconductor 15-13 Table 15-2. SI x RAM Entry (MCC = 1) Bits Name Description 0 MCC If MCC =1, the other SI x RAM entries in this table are valid: 1LOOP/ ECHO Channel loopback or echo. 0…
1239, FCC HDLC Controller MPC8260 PowerQUICC II Family Reference Manual, Rev. 2 Freescale Semiconductor 36-15 Figure 36-8 shows interrupts that can be generated in the HDLC protocol. Table 36-9. FCCE/FCCM Field Descriptions Bits Name Description 0–7 — Reserved, should be cleared…
103, Overview MPC8260 PowerQUICC II Family Reference Manual, Rev. 2 Freescale Semiconductor 1-9 1.2.3 Communications Processor Module (CPM) The CPM contains features that allow the PowerQUICC II to excel in a variety of applications targeted mainly for networking and telecommunication market…
656, SDMA Channels and IDMA Emulation MPC8260 PowerQUICC II Family Reference Manual, Rev. 2 19-12 Freescale Semiconductor Conversely, if the transfer size is small, the DMA requests the 60x bus more often, DMA latency increases and microcode efficiency decreases. Example: A channel is configured for…
1093, ATM AAL2 MPC8260 PowerQUICC II Family Reference Manual, Rev. 2 Freescale Semiconductor 32-31 32.4.4.7 SSSAR Rx Queue Descriptor The SSSAR RxQD, as shown in Figure 32-20, points to the RxBD table and contains other parameters specific to the SSSAR sublayer. This descriptor can belong …
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