Fujitsu MB86617A Manual, Specification Sheet

Manual, Specification Sheet for Fujitsu MB86617A Network Card (139 pages)

Specifications:

289/289042-mb86617a.pdf file (17 Oct 2023)
  • Manufacturer: Fujitsu
  • Category of Device: Network Card
  • Document: MB86617A, File Type: PDF Specification Sheet
  • Updated: 17-10-2023
  • Count of Pages: 139
Download MB86617A Manual (139 pages)

Read PDF Document Online:

Data: UPD 17th October 2023

Fujitsu MB86617A Network Card PDF Specification Sheet (Updated: Tuesday 17th of October 2023 11:04:06 AM)

Rating: 4.1 (rated by 73 users)

Compatible devices: FMC-16LX/FR, Point 1600, 500, Stylistic LT LT, Solaris PCI GigabitEthernet 3.0, MB91360 SERIES, FMC-16FX FAMILY ADA-16FX-ETHERNET, PCI Gigabit Ethernet.

Recommended Documentation:

  • P-600 - Stylistic LT Installation manual (UPD: 28 Dec 2023, fujitsu/p-600-stylistic-lt.pdf) ()
  • Serial Adapter FMW43SA01 Installation instructions (UPD: 06 Oct 2023, fujitsu/serial-adapter-fmw43sa01.pdf) ()
  • Stylistic LT LT User instructions (UPD: 11 Sep 2023, fujitsu/stylistic-lt-lt.pdf) ()
  • MB91360 SERIES Operation & user’s manual (UPD: 18 Feb 2024, fujitsu/mb91360-series.pdf) ()

Text Version of Fujitsu MB86617A Network Card Manual (Summary of Contents)

(Ocr-Read of Fujitsu MB86617A Document (Main Content), UPD: 17 October 2023)

  • 87, LSI Specification MB86617A Rev.1.0 Fujitsu VLSI 82 PHY/LINK addr Write Read 2Ch Physical register #17 ← 2Eh Physical register #18 ← 30h Physical register #19 ← 32h Physical register #1A ← 34h Physical register #1B ← 36h Physical register #…

  • 45, LSI Specification MB86617A Rev.1.0 Fujitsu VLSI 40 7.10. Transmit Offset Setting Register [B] Transmit off set setting register [B] is the register that sets offset value added to cycle-time-monitor value Its aim is to generate source packet header (Time-stamp) added t…

  • 39, LSI Specification MB86617A Rev.1.0 Fujitsu VLSI 34 7.6. A-buffer Data Port Receive/Transmit This integrated register is the buffer access port for both ASYNC receive specific buffer and ASYNC transmit specific one. Read data is able to be read out IEEE1394 pac…

  • 81, Fujitsu MB86617A LSI Specification MB86617A Rev.1.0 Fujitsu VLSI 76 7.38. Transmit CGMS/TSCH Indicate Status Register Transmit CGMS/TSCH indicate status register indicates validity of source packet input from TSP IC I/F. AD R/W Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 …

  • 131, LSI Specification MB86617A Rev.1.0 Fujitsu VLSI 126 <Host> <Device> Figure 11.5 Flow example for transmittin…

  • 44, LSI Specification MB86617A Rev.1.0 Fujitsu VLSI 39 7.9. Transmit Offset Setting Register [A] Transmit offset setting register [A] is the register that sets offset value added to cycle-time-monitor value. Its aim is to generate source packet header (Time-stamp) added to tran…

DOC-a3535d0b:

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