Specifications:291/291924-mpap100.pdf file (27 Jan 2024)
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Quatech MPAP-100 Adapter PDF Operation & User’s Manual (Updated: Saturday 27th of January 2024 12:01:19 AM)
Rating: 4.4 (rated by 14 users)
Compatible devices: QSP-100, SS-BLT-100, DSCLP-100, DSC-300, Asynchronous Communications Adapter DSC-200/300, DSC-100, DSU2-100, CP-ESCLP-D25.
Recommended Documentation:
51, 16 Receive Pattern Character Register The Receive Pattern Character Register is used to set the character value to be used in receive pattern detection. The address of this register is Base+B (hex). This register can be ignored if the external FIFOs are not being used. character value (0-…
50, Quatech MPAP-100 15 FIFO Control Register The FIFO Control Register is used to control the external data FIFOs. The address of this register is Base+A (hex). Table 13 details the bit definitions of the register. This register can be ignored if the external FIFOs are not being used. TX_RESET000R…
15, If configuration is successful, the enabler will display a message showing the configuration on the screen. If the MPAP-100 is not successfully configured, then the information in this section along with the Troubleshooting chapter of this manual should be consulted to determine the c…
23, addr (required) The base I/O address of the MPAP-100. This number must be a three-digit hexadecimal value ending in 0. irq (required) The interrupt level (IRQ) of the MPAP-100. This decimal number must be one of the following values: 3, 4, 5, 7, 9, 10, 11, 12, 14, 15, or 0 if no IRQ is d…
35, 9.5 SCC Incompatibility Warnings Due to the SCC implementation used by the MPAP-100, there are two minor incompatibilities that the software programmer must avoid. 9.5.1 Register Pointer Bits In a Zilog 85230, the control port register pointer bits can be set in either channel. W…
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