Intel UPI-C42 Operation & User’s Manual

Operation & User’s Manual for Intel UPI-C42 Computer Hardware (25 pages)

Specifications:

473/473451-upic42.pdf file (14 Feb 2024)
  • Manufacturer: Intel
  • Category of Device: Computer Hardware
  • Document: UPI-C42, File Type: PDF Operation & User’s Manual
  • Updated: 14-02-2024
  • Count of Pages: 25
Download UPI-C42 Manual (25 pages)

Read PDF Document Online:

Data: UPD 14th February 2024

Intel UPI-C42 Computer Hardware PDF Operation & User’s Manual (Updated: Wednesday 14th of February 2024 05:07:33 AM)

Rating: 4.3 (rated by 44 users)

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Text Version of Intel UPI-C42 Computer Hardware Manual (Summary of Contents)

(Ocr-Read of Intel UPI-C42 Document (Main Content), UPD: 14 February 2024)

  • 19, UPI-C42/UPI-L42 AC CHARACTERISTICSÐPROGRAMMING (UPI-C42 AND UPI-L42) T A e 25 § C g 5 § C, V CC e 6.25V g 0.25V, V DDL ea 5V g 0.25V, V DDH e 12.75V g 0.25V (87C42/87L42 ONLY) Symbol Parameter Min Max Units t AW Address Setup Time to RESET u 4t CY t WA Address Hold Time after RESET u 4t CY …

  • 17, UPI-C42/UPI-L42 AC CHARACTERISTICS T A e 0 § Cto a 70 § C, V SS e 0V, V CC e V DD ea 5V g 10%; a 3.3V g 10% for the UPI-L42 NOTE: All AC Characteristics apply to both the UPI-C42 and UPI-L42 DBB READ Symbol Parameter Min Max Units t AR CS, A 0 Setup to RD v 0ns t RA CS, A 0 Hold A…

  • 8, UPI-C42/UPI-L42 Table 2 covers all suspend mode pin states. In addi- tion to the suspend power down mode, the UPI-C42 will also support the NMOS power down mode as outlined in Chapter 4 of the UPI-42AH users manual. Table 2. Suspend Mode Pin States Pins Suspend Ports 1 and 2 Outputs Tri…

  • 22, Intel UPI-C42 UPI-C42/UPI-L42 WAVEFORMS (Continued) COMBINATION PROGRAM/VERIFY MODE 290414–25 NOTES: 1. A 0 must be held low (0V) during program/verify modes. 2. For V IH ,V IH1 ,V IL ,V IL1 ,V DDH , and V DDL , please consult the D.C. Characteristics Table. 3. When programming the 87C42, a 0.1 mF c…

  • 3, UPI-C42/UPI-L42 Table 1. Pin Description (Continued) DIP PLCC QFP Symbol Pin Pin Pin Type Name and Function No. No. No. P 20 –P 27 21–24 24–27 39–42 I/O PORT 2: 8-bit, PORT 2 quasi-bidirectional I/O lines. The lower 4 bits (P 20 –P 23 ) interface directly to the 8243 I/O expander devi…

  • 23, UPI-C42/UPI-L42 WAVEFORMS (Continued) DMA 290414–27 PORT 2 290414–28 PORT TIMING DURING EXTERNAL ACCESS (EA) 290414–29 On the Rising Edge of SYNC and EA is Enabled, Port Data is Valid and can be Strobed. On the Trailing Edge of Sync the Program Counter Contents are Available. …

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