Silicon Laboratories SI5319 Reference Manual

Reference Manual for Silicon Laboratories SI5319 Clock, Computer Hardware (184 pages)

Specifications:

330/330912-si5319.pdf file (17 Nov 2023)
  • Manufacturer: Silicon Laboratories
  • Category of Device: Clock, Computer Hardware
  • Document: SI5319, File Type: PDF Reference Manual
  • Updated: 17-11-2023
  • Count of Pages: 184
Download SI5319 Manual (184 pages)

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Data: UPD 17th November 2023

Silicon Laboratories SI5319 Clock, Computer Hardware PDF Reference Manual (Updated: Friday 17th of November 2023 07:48:53 AM)

Rating: 4.6 (rated by 38 users)

Compatible devices: Si825x, UNI-C8051F020, UG291, EFR32MG12, EFR32xG21 Wireless Gecko, Si47xx-EVB, Si5342, SI5324.

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Text Version of Silicon Laboratories SI5319 Clock, Computer Hardware Manual (Summary of Contents)

(Ocr-Read of Silicon Laboratories SI5319 Document (Main Content), UPD: 17 November 2023)

  • 70, Si53xx-RM 70 Rev. 0.52 6.6. Output Phase Adjust (Si5323, Si5366) Overall device skew (CKINn to CKOUT_n phase delay) is controllable via the INC and DEC input pins. A positive pulse applied at the INC pin increases the device skew by 1/f OSC , one period of the DCO output clock. A pulse on…

  • 173, Si53xx-RM Rev. 0.52 173 APPENDIX J—Si5374 AND Si5375 CROSSTALK While the four DSPLLs of the Si5374 and Si5375 are in close physical and electrical proximity to one another, crosstalk interference between the DSPLLs is minimal. The following measurements show typical performance levels that…

  • 19, Si53xx-RM Rev. 0.52 19 3.4. Si5323 The Si5323 is a jitter-attenuating precision clock multiplier for high-speed communication systems, including SONET OC-48/OC-192, Ethernet, Fibre Channel, and broadcast video (HD SDI, 3G SDI). The Si5323 accepts dual clock inputs ranging from 8 kHz…

  • 179, Silicon Laboratories SI5319 Si53xx-RM Rev. 0.52 179 Figure 104. Ethernet Suggested P3A P1B P3C P2D Not recommended P3A P1A P3C P4D Ethernet SONET OTN/OTU …

  • 171, Si53xx-RM Rev. 0.52 171 The following is a set of recommendations and guidelines for printed circuit board layout with the Si5374 and Si5374 devices. Because the four DSPLLs are in close physical and electrical proximity to one another, PCB layout is critical to achieving the highest levels o…

  • 77, Si53xx-RM Rev. 0.52 77 Figure 26. Narrowband PLL Divider Settings (Si5319, Si5324, Si5326, Si5327, Si5368, Si5369, Si5374, Si5375) Table 35. Narrowband Frequency Limits Signal Frequency Limits CKINn 2 kHz–710 MHz f 3 2 kHz–2 MHz f OSC 4.85–5.67 GHz f OUT 2 kHz–1.475 GHz Note:…

DOC-16bb3d22:

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