Celoxica RC200 Manual, Manaul

26, Installation and set-up 4.9 Ethernet The RC200/203 is fitted with a Standard Microsystems Corporation LAN91C111 Ethernet device. It supports 8-bit and 16-bit access to the FPGA. The device has a clock input of 25MHz, generated from the CPLD. For more information about the device …

6, RC200/203 Manual Conventions The following conventions are used in this document. 2 Warning Message. These messages warn you that actions may damage your hardware. Ï Handy Note. These messages draw your attention to crucial pieces of information. Hexadecimal numbers wi…

60, Hardware description 5.15.5 Resetting t macro pro et (ResultPtr); r iming: ore. Description: Resets the SmartMedia device. You can reset the device at any time; the reset operation is the only one that can be run ignoring the busy status returned by the ing S ers: bytes of type …

36, Hardware description 5 RC200/203 PSL reference The RC200/203 Platform Support Library is provided as part of the Platform Developer's Kit. Throughout this documentation "RC200" should be taken to refer to both RC200 and RC203 unless explicitly noted otherwise. This Libr…

14, Celoxica RC200 Installation and set-up 4.2 RC200/203 connectors CONNECTORS ON THE RC200/203 4.3 CPLD The RC200/203 has a Xilinx XC95144XL 3.3V CPLD. The CPLD is connected to the: • FPGA • Parallel port • SmartMedia Flash RAM • JTAG chain The CPLD can configure the FPGA with …