Cypress Semiconductor CY7C1215H Manual, Specification Sheet

9, CY7C1215H Document #: 38-05666 Rev. *B Page 9 of 15 Switching Characteristics Over the Operating Range [10, 11] Parameter Description 166 MHz 133 MHz Unit Min. Max Min. Max t POWER V DD (Typical) to the First Access [12] 1 1ms Clock t CYC Clock Cycle Time 6.0 7.5 ns t CH Clock HI…

5, CY7C1215H Document #: 38-05666 Rev. *B Page 5 of 15 Interleaved Burst Address Table (MODE = Floating or V DD ) First Address A 1 , A 0 Second Address A 1 , A 0 Third Address A 1 , A 0 Fourth Address A 1 , A 0 00 01 10 11 01 00 11 10 10 11 00 01 11 10 01 00 Linear Burst Address Table (…

2, CY7C1215H Document #: 38-05666 Rev. *B Page 2 of 15 Pin Configuration Selection Guide 166 MHz 133 MHz Unit Maximum Access Time 3.5 4.0 ns Maximum Operating Current 240 225 mA Maximum CMOS Standby Current 40 40 mA A A A A A 1 A 0 NC/72M NC/36M V SS V DD NC/18M NC/9M A A A A A NC/2M NC…

3, CY7C1215H Document #: 38-05666 Rev. *B Page 3 of 15 Pin Definitions Name I/O Description A 0 , A 1 , A Input- Synchronous Address Inputs used to select one of the 32K address locations. Sampled at the rising edge of the CLK if ADSP or ADSC is active LOW, and CE 1 , CE 2 , and CE 3 are sampled…

14, Cypress Semiconductor CY7C1215H CY7C1215H Document #: 38-05666 Rev. *B Page 14 of 15 © Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embo…